Yields in IC device fabrication processes often incur defects resulting from alignment variations of subsurface layers or patterns or particulate contaminants. FIGS. 1, 2A, and 2B show repetitive electronic circuits 10 of an IC device or work piece 12 that are commonly fabricated in rows or columns to include multiple iterations of redundant circuit elements 14, such as spare rows 16 and columns 18 of memory cells 20. With reference to FIGS. 1, 2A, and 2B, circuits 10 are also designed to include particular laser severable conductive links 22 between electrical contacts 24 that can be removed to disconnect a defective memory cell 20, for example, and substitute a replacement redundant cell 26 in a memory device such as a DRAM, an SRAM, or an embedded memory. Similar techniques are also used to sever links 22 to program a logic product, gate arrays, or ASICs.
Links 22 are about 0.3-2 microns (μm) thick and are designed with conventional link widths 28 of about 0.4-2.5 μm, link lengths 30, and element-to-element pitches (center-to-center spacings) 32 of about 2-8 μm from adjacent circuit structures or elements 34, such as link structures 36. Although the most prevalent link materials have been polysilicon and like compositions, memory manufacturers have more recently adopted a variety of more conductive metallic link materials that may include, but are not limited to, aluminum, copper, gold, nickel, titanium, tungsten, platinum, as well as other metals, metal alloys, metal nitrides such as titanium or tantalum nitride, metal silicides such as tungsten silicide, or other metal-like materials.
Circuits 10, circuit elements 14, or cells 20 are tested for defects, the locations of which may be mapped into a database or program. Traditional 1.047 μm or 1.064 μm infrared (IR) laser wavelengths have been employed for more than 20 years to explosively remove conductive links 22. Conventional memory link processing systems focus a single pulse of laser output having a pulse width of about 4 to 30 nanoseconds (ns) at a selected link 22. FIGS. 2A and 2B show a laser spot 38 of spot size (area or diameter) 40 impinging a link structure 36 composed of a polysilicon or metal link 22 positioned above a silicon substrate 42 and between component layers of a passivation layer stack including an overlying passivation layer 44 (shown in FIG. 2A but not in FIG. 2B), which is typically 500-10,000 angstrom (Å) thick, and an underlying passivation layer 46. Silicon substrate 42 absorbs a relatively small proportional quantity of IR laser radiation, and conventional passivation layers 44 and 46 such as silicon dioxide or silicon nitride are relatively transparent to IR laser radiation. The links 22 are typically processed “on-the-fly” such that the beam positioning system does not have to stop moving when a laser pulse is fired at a selected link 22, with each link 22 being processed by a single laser pulse. The on-the-fly process facilitates a very high link-processing throughput, such as processing several tens of thousands of links 22 per second.
FIG. 2C is .a fragmentary cross-sectional side view of the link structure of FIG. 2B after the link 22 is removed by the prior art laser pulse. To avoid damage to the substrate 42 while maintaining sufficient laser energy to process a metal or nonmetal link 22, Sun et al. in U.S. Pat. No. 5,265,114 and U.S. Pat. No. 5,473,624 proposed using a single 9 to 25 ns laser pulse at a longer laser wavelength, such as 1.3 μm, to process memory links 22 on silicon wafers. At the 1.3 μm, wavelength, the laser energy absorption contrast between the link material and silicon substrate 20 is much larger than that at the traditional 1 μm laser wavelengths. The much wider laser processing window and better processing quality afforded by this technique has been used in the industry for about five years with great success.
The 1 μm and 1.3 μm laser wavelengths have disadvantages however. The energy coupling efficiency of such IR laser beams 12 into a highly electrically conductive metallic link 22 is relatively poor; and the practical achievable spot size 40 of an IR laser beam for link severing is relatively large and limits the critical dimensions of link width 28, link length 30 between contacts 24, and link pitch 32. This conventional laser link processing relies on heating, melting, and evaporating link 22, and creating a mechanical stress build-up to explosively open overlying passivation layer 44 with a single laser pulse. Such a conventional link processing laser pulse creates a large heat affected zone (HAZ) that could deteriorate the quality of the device that includes the severed link. For example, when the link is relatively thick or the link material is too reflective to absorb an adequate amount of the laser pulse energy, more energy per laser pulse has to be used. Increased laser pulse energy increases the damage risk to the IC chip. However, using a laser pulse energy within the risk-free range on thick links often results in incomplete link severing.
U.S. Pat. No. 6,057,180 of Sun et al. describes a method of using ultraviolet (UV) laser output to sever links with the benefit of a smaller beam spot size. However, removal of the link itself by such a UV laser pulse entails careful consideration of the underlying passivation structure and material to protect the underlying passivation and silicon wafer from being damaged by the UV laser pulse.
U.S. Pat. No. 5,329,152 of Janai et al. describes coating a metal layer with a laser absorbing resist material (and an anti-reflective material), blowing away the coatings with a high-powered YAG, excimer, or pulsed laser diode with fluences of 0.2-10 J/cm2 at a 350-nm wavelength, and then etching the uncovered metal with a chemical or plasma etch process. In an alternative to blowing away the resist, Janai describes using laser pulses that travel through a resist material so that the laser pulses can react with the underlying metal and integrate it into the resist material to make the resist material etchable along with the metal (and/or partially blowing away the resist material).
U.S. Pat. No. 5,236,551 of Pan teaches providing metalization portions, covering them with a photoabsorptive polymeric dielectric, ablating the dielectric to uncover portions of the metal, etching the metal, and then coating the resulting surface with a polymeric dielectric. Pan discloses only excimer lasers having wavelengths of less than 400 nm and relies on a sufficiently large energy fluence per pulse (10 mJ/cm2 to 350 mJ/cm2) to overcome the ablative photodecomposition threshold of the polymeric dielectric.
U.S. Pat. No. 6,025,256 of Swenson et al. describes methods of using ultraviolet (UV) laser output to expose or ablate an etch protection layer, such as a resist or photoresist, coated over a link that may also have an overlying passivation material, to permit link removal (and removal of the overlying passivation material) by different material removal mechanisms, such as by chemical etching. This process enables the use of an even smaller beam spot size. However, expose and etch removal techniques employ additional coating steps and additional developing and/or etching steps. The additional steps typically entail sending the wafer back to the front end of the manufacturing process for extra step(s).
U.S. Pat. No. 5,656,186 of Mourou et al. discloses a general method of laser induced breakdown and ablation at several wavelengths by high repetition rate ultrafast laser pulses, typically shorter than 10 ps, and demonstrates creation of machined feature sizes that are smaller than the diffraction limited spot size.
U.S. Pat. No. 5,208,437 of Miyauchi et al. discloses a method of using a single “Gaussian”-shaped pulse of a subnanosecond pulse width to process a link.
U.S. Pat. No. 5,742,634 of Rieger et al. discloses a simultaneously Q-switched and mode-locked neodymium (Nd) laser device with diode pumping. The laser emits a series of pulses each having a duration time of 60 to 300 picoseconds (ps), under an envelope of a time duration of 100 ns.